(1) Field of the Invention
The invention relates to the general field of semiconductor integrated circuits, more particularly to the passivation of such circuits and to stress-induced metal voids that may be formed during passivation.
(2) Description of the Prior Art
Once all the steps required to fabricate a working integrated circuit have been completed, there still remains the important step of passivating the circuit, that is protecting it from possible contamination during its operating lifetime. It is old in the art to use two deposited layers for this purpose--one (such as silicon nitride) as a barrier against external contaminants and a second (such as phosphosilicate glass) as a getter, or scavenger, to neutralize contaminants already present.
In the course of exercising this two layer procedure, several days may elapse between the two depositions. Failure of some of the product that had been subject to this delay between depositions was observed and was correlated with excessive exposure to moisture of the phosphosilicate glass layer prior to the application of the silicon nitride layer.
We were unable to find any prior art that relates to this phenomenon. Razouk (U.S. Pat. No. 4,455,325 June, 1984) discusses heating of phosphosilicate glass in a moist atmosphere for the purpose of partially reflowing phosphosilicate glass, the moisture being intentionally added as a necessary component of the environment in which the reflow occurs.